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general description the max2440/max2441/MAX2442 highly integrated front-end receiver ics provide the lowest cost solution for cordless phones and ism-band radios operating in the 900mhz band. all devices incorporate receive image- reject mixers to reduce filter cost. they operate with a +2.7v to +4.8v power supply, allowing direct connection to a 3-cell battery stack. the signal path incorporates an adjustable-gain lna and an image-reject downconverter with 35db image suppression. these features yield excellent combined downconverter noise figure (4db) and high linearity with an input third-order intercept point (ip3) of up to +2dbm. all devices include an on-chip local oscillator (lo), requiring only an external varactor-tuned lc tank for operation. the integrated divide-by-64/65 dual-modulus prescaler can also be set to a direct mode, in which it acts as an lo buffer amplifier. three separate power- down inputs can be used for system power manage- ment, including a 0.5? shutdown mode. these parts are compatible with commonly used modulation schemes such as fsk, bpsk, and qpsk, as well as fre- quency hopping and direct sequence spread-spectrum systems. all devices come in a 28-pin ssop package. evaluation kits are available for the max2420/ max2421/max2422. the max2420/max2421/max2422 are transceivers whose receive sections and pinout are identical to the max2440/max2441/MAX2442. for complete transceiver devices, refer to the max2420/ max2421/max2422/max2460/max2463 and max2424/ max2426 data sheets. ________________________applications cordless phones spread-spectrum communications wireless telemetry two-way paging wireless networks features receive mixer with 35db image rejection adjustable-gain lna up to +2dbm combined receiver input ip3 4db combined receiver noise figure low current consumption: 23ma receive 9.5ma oscillator 0.5a shutdown mode operates from single +2.7v to +4.8v supply max2440/max2441/MAX2442 900mhz image-reject receivers ________________________________________________________________ maxim integrated products 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 gnd gnd gnd tank gnd preout pregnd mod div1 vcoon rxon gnd gnd gnd lnagain gnd gnd gnd rxin gnd rxout cap1 ssop top view max2440 max2441 MAX2442 tank v cc v cc v cc v cc v cc ___________________pin configuration 19-1352; rev 2; 12/00 part max2440 eai max2441 eai MAX2442 eai -40? to +85? -40? to +85? -40? to +85? temp. range pin-package 28 ssop 28 ssop 28 ssop _______________ordering information functional diagram appears at end of data sheet. high side injection type f rf + 10.7 lo freq (mhz) high side high side f rf + 70 f rf + 46 MAX2442 max2441 70 46 max2440 part 10.7 if freq (mhz) ______________________selector guide evalu a tio n k it a v aila ble for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
max2440/max2441/MAX2442 900mhz image-reject receivers 2 _______________________________________________________________________________________ absolute maximum ratings dc electrical characteristics (v cc = +2.7v to +4.8v, no rf signals applied, lnagain = unconnected, v vcoon = 2.4v, v rxon = v mod = v div1 = 0.45v, pregnd = gnd, t a = t min to t max . typical values are at t a = +25?, v cc = +3.3v, unless otherwise noted.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 1: 25? guaranteed by production test, <25? guaranteed through correlation to worst-case temperature testing. note 2: calculated by measuring the combined oscillator and prescaler supply current and subtracting the oscillator supply current. note 3: calculated by measuring the combined oscillator and lo buffer supply current and subtracting the oscillator supply current. note 4: calculated by measuring the combined receive and oscillator supply current and subtracting the oscillator supply current. with lnagain = gnd, the supply current drops by 4.5ma. v cc to gnd ...........................................................-0.3v to +5.5v voltage on lnagain, rxon, vcoon, div1, mod .............................................-0.3v to (v cc + 0.3v) rxin input power..............................................................10dbm tank, tank input power ...................................................2dbm continuous power dissipation (t a = +70?) ssop (derate 9.50mw/? above +70?) ....................762mw operating temperature range max244_eai ...................................................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +165? lead temperature (soldering, 10s) .................................+300? parameter min typ max units receive supply current 23 36 ma prescaler supply current (buffer mode) 5.4 8.5 ma oscillator supply current supply-voltage range 2.7 4.8 v 9.5 14 ma prescaler supply current (divide-by-64/65 mode) 4.2 6 ma conditions v rxon = 2.4v, pregnd = unconnected (note 4) v div1 = 2.4v (note 3) pregnd = unconnected (note 2) digital input voltage low 0.45 v 0.5 rxon, div1, vcoon, mod vcoon = rxon = mod = div1 = gnd digital input current ? ?0 ? voltage on any one digital input = v cc or gnd digital input voltage high v 2.4 rxon, div1, vcoon, mod shutdown supply current 10 ? t a = +25? t a = t min to t max
ac electrical characteristics (max242x/max246x ev kit, v cc = +3.3v; f lo = 925.7mhz (max2440), f lo = 961mhz (max2441), f lo = 985mhz (MAX2442), f rxin = 915mhz; p rxin = -35dbm; v lnagain = 2v; v vcoon = v rxon = 2.4v; rxon = mod = div1 = pregnd = gnd; t a = +25?, unless otherwise noted.) max2440/max2441/MAX2442 900mhz image-reject receivers _______________________________________________________________________________________ 3 conditions units min typ max parameter mhz 800 1000 36 46 55 8.5 10.7 12.5 mhz 20 22 24.5 db 26 35 image frequency rejection 55 70 85 19.5 25 12 19 21 23.5 (note 7) -16 (notes 5, 8) dbm -8 input third-order intercept -19 -17 (note 9) ns 500 receiver turn-on time receiver on or off dbm -60 lo to rxin leakage v lnagain = 1v dbm -18 input 1db compression lnagain = v cc -26 18 24 lnagain = v cc , t a = t min to t max (note 5) 45 db 12 noise figure db if frequency range (notes 5, 6) (notes 5, 6) input frequency range conversion power gain div1 = v cc (notes 5, 7) max2441 MAX2442 lnagain = v cc v lnagain = 1v v lnagain = 1v lnagain = v cc MAX2442 v lnagain = 1v lnagain = gnd max2440 lnagain = v cc , t a = +25? max2440/max2441 max2440/max2441 MAX2442 receiver
max2440/max2441/MAX2442 900mhz image-reject receivers 4 _______________________________________________________________________________________ ac electrical characteristics (continued) (max242x/max246x ev kit, v cc = +3.3v; f lo = 925.7mhz (max2440), f lo = 961mhz (max2441), f lo = 985mhz (MAX2442), f rxin = 915mhz; p rxin = -35dbm; v lnagain = 2v; v vcoon = v rxon = 2.4v; rxon = mod = div1 = pregnd = gnd; t a = +25?, unless otherwise noted.) oscillator phase noise oscillator frequency range 690 1100 mhz 82 dbc/hz 8 (notes 5, 10) 10khz offset (note 11) standby to rx note 5: guaranteed by design and characterization. note 6: image rejection typically falls to 30dbc at the frequency extremes. note 7: refer to the typical operating characteristics for plots showing receiver gain versus lnagain voltage, input ip3 versus lnagain voltage, and noise figure versus lnagain voltage. note 8: two tones at p rxin = -45dbm each, f1 = 915.0mhz and f2 = 915.2mhz. note 9: time delay from rxon = 0.45v to rxon = 2.4v transition to the time the output envelope reaches 90% of its final value. note 10: refers to useable operating range. tuning range of any given tank circuit design is typically much narrower (refer to figure 1) . note 11: using tank components l3 = 5.0nh (coilcraft a02t), c2 = c3 = c26 = 3.3pf, r6 = r7 = 10 ? . note 12: this approximates a typical application in which a transmitter is followed by an external pa and a t/r switch with finite isolation. note 13: relative to the rising edge of preout. prescaler output level 500 mvp-p -11 -8 required modulus setup time 10 ns z l = 100k ? | | 10pf divide-by-64/65 mode (notes 5, 13) standby mode with p rxin = -45dbm to p rxin = 0dbm (note 12) 70 oscillator buffer output level -12 dbm oscillator pulling khz parameter min typ max units conditions t a = t min to t max t a = +25? div1 = 2.4v, z l = 50 ? (note 5) oscillator and prescaler
max2440/max2441/MAX2442 900mhz image-reject receivers _______________________________________________________________________________________ 5 24 28 26 34 32 30 40 38 36 42 -40 0 20 -20 40 60 80 100 receiver supply current vs. temperature max2440/1/2-01 temperature (?) i cc (ma) v cc = 2.7v pregnd = unconnected includes oscillator current v cc = 3.3v v cc = 4.8v 0 1.0 0.5 2.5 2.0 1.5 4.0 3.5 3.0 4.5 -40 0 20 -20 406080100 shutdown supply current vs. temperature max2440/1/2-02 temperature ( c) i cc ( a) v cc = 2.7v v cc = 3.3v v cc = 4.8v vcoon = gnd rxon = gnd 25 20 15 10 5 0 -5 -10 -15 -20 0 0.5 1.0 1.5 2.0 receiver gain vs. lnagain max2440/1/2-03 lnagain voltage (v) receiver gain (db) adjustable gain max gain lna partially biased lna off avoid this region 18 22 20 26 24 -40 0 20 -20 406080100 max2440 receiver gain vs. temperature max2440/1/2-06 temperature ( c) receiver gain (db) v cc = 2.7v v cc = 3.3v v cc = 4.8v lnagain = v cc -20 -15 -10 -5 0 5 0 0.5 1.0 1.5 2.0 receiver input ip3 vs. v lnagain max2440/1/2-04 lnagain voltage (v) iip3 (dbm) adjustable gain avoid this region max gain lna partially biased lna off 0 5 15 10 25 20 30 40 35 0 0.5 1.0 1.5 2.0 receiver noise figure vs. lnagain max2440/1/2-05 lnagain voltage (v) noise figure (db) adjustable gain avoid this region max gain lna partially biased lna off div1 = v cc 3.0 4.0 3.5 5.0 5.5 4.5 -40 0 20 -20 40 60 80 100 receiver noise figure vs. temperature and supply voltage max2440/1/2-07 temperature ( c) noise figure (db) v cc = 2.7v v cc = 3.3v v cc = 4.8v lnagain = v cc div1 = v cc -20 -16 -18 -8 -10 -6 -12 -14 -40 0 20 -20 40 60 80 100 receiver input ip3 vs. temperature max2440/1/2-08 temperature ( c ) iip3 (dbm) v lnagain = 1v v lnagain = 2v typical operating characteristics (max242x/max246x ev kit, v cc = +3.3v; f lo = 925.7mhz (max2440), f lo = 961mhz (max2441), f lo = 985mhz (MAX2442), f rxin = 915mhz; p rxin = -35dbm; v lnagain = 2v; v vcoon = 2.4v; rxon = v cc ; mod = div1 = pregnd = gnd; t a = +25?, unless otherwise noted.) -9 -8 -4 -5 -3 -6 -7 -40 0 20 -20 40 60 80 max2440 rxout 1db compression point vs. temperature max2440/1/2-9 temperature ( c ) 1db compression point (dbm) v cc = 2.7v v cc = 4.8v v cc = 3.3v
550 500 0 11k10k 100 100k prescaler output level vs. load resistance 100 50 max2440/1/2-13 load resistance ( ? ) prescaler output level (mvp-p) 200 150 350 300 250 450 400 load is plotted resistance in parallel with a 10pf oscilloscope probe ( 64/65 mode) max2440/max2441/MAX2442 900mhz image-reject receivers 6 _______________________________________________________________________________________ typical operating characteristics (continued) (max242x/max246x ev kit, v cc = +3.3v; f lo = 925.7mhz (max2440), f lo = 961mhz (max2441), f lo = 985mhz (MAX2442), f rxin = 915mhz; p rxin = -35dbm; v lnagain = 2v; v vcoon = 2.4v; rxon = v cc ; mod = div1 = pregnd = gnd; t a = +25?, unless otherwise noted.) -20 10 -10 0 30 20 50 40 60 0 400 800 1200 1600 2000 receiver image rejection vs. rf frequency max2440/1/2-10 rf frequency (mhz) image rejection (db) rxon = v cc 40 0 1 1000 100 10 receiver image rejection vs. if frequency 20 15 10 5 30 25 35 max2440/1/2-11 if frequency (mhz) image rejection (db) max2440 max2441 MAX2442 0 25 30 15 20 10 5 35 40 45 50 -0 -60 -40 -20 -80 -100 800 600 1000 1200 1400 rxin input impedance vs. frequency max2440/1/2-12 frequency (mhz) real impedance ( ? ) real imaginary imaginary impedance ( ? )
max2440/max2441/MAX2442 900mhz image-reject receivers _______________________________________________________________________________________ 7 pin description div1 18 driving div1 with a logic high disables the divide-by-64/65 prescaler and connects the preout pin directly to an oscillator buffer amplifier, which outputs -8dbm into a 50 ? load. tie div1 low for d ivide-by- 64/65 operation. pull this pin low when in shutdown to minimize off current. rxon vcoon mod 16 driving rxon with a logic high enables the lna, receive mixer, and if output buffer. vcoon must also be high. 17 driving vcoon with a logic high turns on the vco, phase shifters, vco buffers, and prescaler. the prescaler can be selectively disabled by floating the pregnd pin. 19 modulus control for the d ivide-by-64/65 prescaler: high = d ivide-by-64, low = divide-by-65. note that the div1 pin must be at logic low when using the prescaler mode. pregnd preout 20 v cc 11 supply voltage input for signal-path blocks, except lna. bypass with a 47pf low-inductance capacitor and 0.01? to gnd (pin 8 recommended). gnd 8 ground connection for signal-path blocks, except lna. connect directly to ground plane. name v cc cap1 rxout gnd 7 ground connection for receive low-noise amplifier. connect directly to ground plane using multiple vias. lnagain 10 low-noise amplifier gain-control input. drive this pin high for maximum gain. when lnagain is pulled low, the lna is capacitively bypassed and the supply current is reduced by 4.5ma. this pin can also be driven with an analog voltage to adjust the lna gain in intermediate states. refer to the receiver gain vs. lnagain voltage graph in the typical operating characteristics, as well as table 1. pin function 1 supply-voltage input for master bias cell. bypass with a 47pf low-inductance capacitor and 0.1? to gnd (pin 28 recommended). 2 receive bias compensation pin. bypass with a 47pf low-inductance capacitor and 0.01? to gnd. do not make any other connections to this pin. 3 single-ended, 330 ? if output. ac couple to this pin. ground connection for the prescaler. tie pregnd to ground for normal operation. leave floating to disable the prescaler and the output buffer. tie mod and div1 to ground and leave preout floating when disabling the prescaler. 21 prescaler/oscillator buffer output. in d ivide-by-64/65 mode (div1 = low), the output level is 500mvp-p into a high-impedance load. in d ivide-by-1 mode (div1 = high), this output delivers -8dbm into a 50 ? load. ac couple to this pin. gnd rxin v cc 4, 9, 12?5 ground connection 5 receiver rf input, single-ended. the input match shown in figure 1 maintains an input vswr of better than 2:1 from 902mhz to 928mhz. 6 supply voltage input for receive low-noise amplifier. bypass with a 47pf low-inductance capacitor to gnd (pin 7 recommended). v cc 22 supply-voltage input for prescaler. bypass with a 47pf low-inductance capacitor and 0.01? to gnd (pin 20 recommended). v cc 23 supply-voltage input for vco and phase shifters. bypass with a 47pf low-inductance capacitor to gnd (pin 26 recommended). tank 24 differential oscillator tank port. see applications information for information on tank circuits or on using an external oscillator. tank 25 differential oscillator tank port. see applications information for information on tank circuits or on using an external oscillator.
max2440/max2441/MAX2442 900mhz image-reject receivers 8 _______________________________________________________________________________________ pin description (continued) ground connection for vco and phase shifters 26 gnd ground (substrate) 27 gnd ground connection for master bias cell 28 gnd function pin name v cc v cc 17 16 15 18 19 21 1000pf varactor: alpha smv1299-004 or equivalent receive if output (330 ? ) see applications information section l3: coilcraft 0805hs-060tmbc 27 23 26 3 12 20 22 1 28 receive rf input 5 9 7 6 0.01 f 47pf v cc v cc 0.1f v cc v cc 2 47pf 0.1f 8.2nh 12nh 47pf 47pf 47pf 8 11 0.01f 47pf 0.01f max2440 max2441 MAX2442 6.8 3.3 3.3 l3 (nh) part vco tank components for 915mhz typical rf c26 (pf) c2, c3 (pf) 1.8 3.6 3.0 3.3 4.0 4.0 r6, r7 ( ? ) 10 15 15 47pf 14 rxin gnd gnd v cc v cc gnd gnd 13 gnd 4 gnd gnd cap1 v cc v cc gnd rxon vcoon div1 mod preout rxon vcoon div1 mod to pll gnd rxout gnd 100nh gnd pregnd 47pf v cc 24 25 vco adjust c3 1k 47k 47pf 1k c2 r6 r7 v cc l3 c26 tank lnagain lnagain 10 max2440 max2441 MAX2442 tank figure 1. typical operating circuit
max2440/max2441/MAX2442 900mhz image-reject receivers _______________________________________________________________________________________ 9 detailed description the following sections describe each of the blocks shown in the functional diagram. receiver the max2440/max2441/MAX2442 s receive path con- sists of a 900mhz low-noise amplifier, an image-reject mixer, and an if buffer amplifier. the lna s gain and biasing are adjustable via the lnagain pin. proper operation of this pin can provide optimum performance over a wide range of signal lev- els. the lna can be placed in four modes by applying a dc voltage on the lnagain pin. see table 1, as well as the relevant typical operating characteristics plots. at low lnagain voltages, the lna is shut off, and the input signal capacitively couples directly into the mixer to provide maximum linearity for large-signal operation (receiver close to transmitter). as the lnagain voltage is raised, the lna begins to turn on. between 0.5v and 1v at lnagain, the lna is partially biased and behaves like a class c amplifier. avoid this operating mode for applications where linearity is a concern. as the lnagain voltage reaches 1v, the lna is fully biased into class a mode, and the gain is monotonical- ly adjustable at lnagain voltages above 1v. see the receiver gain, receiver ip3, and receiver noise figure vs. lnagain plots in the typical operating characteristics for more information. the downconverter is implemented using an image- reject mixer consisting of an input buffer with two out- puts, each of which is fed to a double-balanced mixer. the local-oscillator (lo) port of each mixer is driven from a quadrature lo. the lo is generated from an on- chip oscillator and an external tank circuit. its signal is buffered and split into phase shifters, which provide 90 of phase shift across their outputs. this pair of lo signals is fed to the mixers. the mixers outputs are then passed through a second pair of phase shifters, which provide a 90 phase shift across their outputs. the resulting mixer outputs are then summed together. the final phase relationship is such that the desired signal is reinforced and the image signal is canceled. the down- converter mixer output appears on the rxout pin, a single-ended 330 ? output. phase shifters max2440/max2441/MAX2442 devices use passive networks to provide quadrature phase shifting for the receive if and lo signals. because these networks are frequency selective, proper part selection is important. image rejection degrades as the if and rf move away from the designed optimum frequencies. refer to the selector guide on the front page of this data sheet. local oscillator (lo) the on-chip lo is formed by an emitter-coupled differ- ential pair. an external lc resonant tank sets the oscil- lation frequency. a varactor diode is typically used to create a voltage-controlled oscillator (vco). see the applications information section and figure 2 for an example vco tank circuit. the lo may be overdriven in applications where an external signal is available. the external lo signal should be about 0dbm from 50 ? , and should be ac coupled into either the tank or tank pin. both tank and tank require pull-up resistors to v cc . see the applications information section and figure 3 for details. the local oscillator resists lo pulling caused by changes in load impedance that occur as the part is switched from standby mode. the amount of lo pulling will be affected if there is power at the rxin port due to imper- fect isolation in an external transmit/receive (t/r) switch. prescaler the on-chip prescaler can be used in two different modes: as a dual-modulus d ivide-by-64/65, or as oscil- lator buffer amplifier. the div1 pin controls this func- tion. when div1 is low, the prescaler is in dual-modulus divide-by-64/65 mode; when it is high, the prescaler is disabled and the oscillator buffer amplifier is enabled. the buffer typically outputs -8dbm into a 50 ? load. to minimize shutdown supply current, pull the div1 pin low when in shutdown mode. in divide-by-64/65 mode, the division ratio is controlled by the mod pin. when mod is high, the prescaler is in divide-by-64 mode; when it is low, it divides the lo fre- quency by 65. the div1 pin must be at a logic low in this mode. lna partially biased. avoid this mode the lna operates in a class c manner lna capacitively bypassed, minimum gain, maximum ip3 mode lna at maximum gain (remains monotonic) lna gain is monotonically adjustable 1.5 < v v cc 1.0 < v 1.5 0.5 < v < 1.0 0 < v 0.5 lnagain voltage (v) table 1. lna modes
max2440/max2441/MAX2442 900mhz image-reject receivers 10 ______________________________________________________________________________________ to disable the prescaler entirely, leave pregnd and preout floating. also tie the mod and div1 pins to gnd. disabling the prescaler does not affect operation of the vco stage. power management max2440/max2441/MAX2442 supports three different power-management features to conserve battery life. the vco section has its own control pin (vcoon), which also serves as a master bias pin. when vcoon is high, the lo, quadrature lo phase shifters, and prescaler or lo buffer are all enabled. the vco can be powered up prior to receiving to allow it to stabilize. with vcoon high, bringing rxon high enables the receive path, which consists of the lna, image-reject mixers, and if output buffer. when this pin is low, the receive path is inactive. to disable all chip functions and reduce the supply current to typically less than 0.5a, pull vcoon, div1, mod, and rxon low. applications information oscillator tank the on-chip oscillator requires a parallel-resonant tank circuit connected across tank and tank. figure 2 shows an example of an oscillator tank circuit. inductor l4 provides dc bias to the tank ports. inductor l3, capacitor c26, and the series combination of capacitors c2, c3, and both halves of the varactor diode capaci- tance set the resonant frequency, as follows: where c d1 is the capacitance of one varactor diode. choose tank components according to your application needs, such as phase-noise requirements, tuning range, and vco gain. high-q inductors, such as air- core micro springs, yield low phase noise. use a low- tolerance inductor (l3) for predictable oscillation frequency. resistors r6 and r7 can be chosen from 0 to 20 ? to reduce the q of parasitic resonance due to series package inductance (l t ). keep r6 and r7 as small as possible to minimize phase noise, yet large enough to ensure oscillator start-up in fundamental mode. oscillator start-up will be most critical with high tuning bandwidth (low tank q) and high temperature. capacitors c2 and c3 couple in the varactor. light coupling of the varactor is a way to reduce the effects of high varactor tolerance and increase loaded q. for a wider tuning range; use larger values for c2 and c3 or a varactor with a large capacitance ratio. capacitor c26 is used to trim the tank oscillator frequency. larger values for c26 will help negate the effect of stray pcb capacitance and parasitic inductor capacitance (l3). choose a low tolerance capacitor for c26. for applications that require a wide tuning range and low phase noise, a series coupled resonant tank may be required, as shown in figure 4. this tank will use the package inductance in series with inductors l1, l2, and capacitance of varactor d1 to set the net equiva- lent inductance which resonates in parallel with the internal oscillator capacitance. inductors l1 and l2 may be implemented as microstrip inductors, saving component cost. bias is provided to the tank port through chokes l3 and l5. r1 and r3 should be cho- sen large enough to de-q the parasitic resonance due to l3 and l5, but small enough to minimize the voltage drop across them due to bias current. values for r1 and r3 should be kept between 0 ? and 50 ? . proper high-frequency bypassing (c1) should be used for the bias voltage to eliminate power-supply noise from entering the tank. c = 1 1 c2 eff ++ ? ? ? ? ? ? + 1 3 2 26 1 cc c d f = 1 2l3c r eff ()( ) max2440 max2441 MAX2442 l t l t l3 c26 l4 100nh r5 1k r4 1k d1 = alpha smv1299-004 see figure 1 for r6, r7, c2, c3, c26, and l3 component values. 1/2 d1 1/2 d1 c1 47pf vco_ctrl r7 r6 c3 r8 47k c2 v cc tank tank figure 2. oscillator tank schematic, using the on-chip vco
oscillator-tank pc board layout the parasitic pc board capacitance, as well as pcb trace inductance and package inductance, can affect oscillation frequency, so be careful in laying out the pc board for the oscillator tank. keep the tank layout as symmetrical, tightly packed, and close to the device as possible to minimize lo feedthrough. when using a pc board with a ground plane, a cut-out in the ground plane (and any other planes) below the oscillator tank will reduce parasitic capacitance. using an external oscillator if an external 50 ? lo signal source is available, it can be used as an input to the tank or tank pin in place of the on-chip oscillator (figure 3). the oscillator signal is ac coupled into the tank pin and should have a level of about 0dbm from a 50 ? source. for proper biasing of the oscillator input stage, tank and tank must be pulled up to the v cc supply via 50 ? resistors. if a differential lo source such as the max2620 is available, ac couple the inverting output into tank . max2440/max2441/MAX2442 900mhz image-reject receivers ______________________________________________________________________________________ 11 max2440/max2441/MAX2442 max2440 max2441 MAX2442 tank 50 ? 50 ? ext lo external lo level is 0dbm from a 50 ? source. v cc c block 0.01 f v cc tank figure 3. using an external local oscillator transistor count: 2802 max2440 max2441 MAX2442 tank l1 l2 l3 l4 l5 r1 r2 r3 ci 1/2 d1 1/2 d1 c1 v cc vtune tank l t l t c2 figure 4. series coupled resonant tank for wide tuning range and low phase noise chip information
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2000 maxim integrated products printed usa is a registered trademark of maxim integrated products. max2440/max2441/MAX2442 900mhz image-reject receivers package information ssop.eps functional diagram rxon cap1 rxin lnagain 90 90 0 max2440 max2441 MAX2442 phase shifter 1/64/65 bias rxout div1 mod preout pregnd tank tank vcoon 0

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